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authorNicolas Pomarede <npomarede@corp.free.fr>2024-09-03 20:46:31 (GMT)
committerNicolas Pomarede <npomarede@corp.free.fr>2024-09-03 20:49:23 (GMT)
commit4c803f1b952826af7b3409225e4000dee1eea62e (patch)
treed62c316866e856b742c74fed34a2809d6ea6ff4b
parent2d916d9fdc466adf014a6520abc63342485fe3b3 (diff)
downloadhatari-4c803f1b952826af7b3409225e4000dee1eea62e.zip
hatari-4c803f1b952826af7b3409225e4000dee1eea62e.tar.gz
Add a call to M68000_Flush_All_Caches() in STMemory_SafeCopy()
Since we modify the RAM content directly from the emulator, we must ensure all cached data are flushed (for MegaSTE cache or for >=68020 CPU) If not, the emulated programs might crash sooner or later
-rw-r--r--src/m68000.c4
-rw-r--r--src/stMemory.c5
2 files changed, 7 insertions, 2 deletions
diff --git a/src/m68000.c b/src/m68000.c
index 461df15..36513e9 100644
--- a/src/m68000.c
+++ b/src/m68000.c
@@ -1101,7 +1101,7 @@ void M68000_MMU_Info(FILE *fp, uint32_t flags)
void MegaSTE_CPU_Cache_Update ( uint8_t val )
{
-fprintf ( stderr , "MegaSTE_CPU_Cache_Update 0x%x\n" , val );
+//fprintf ( stderr , "MegaSTE_CPU_Cache_Update 0x%x\n" , val );
/* If cache is disabled, flush all entries */
if ( ( val & 1 ) == 0 )
@@ -1142,7 +1142,7 @@ void MegaSTE_CPU_Set_16Mhz ( bool set_16 )
if ( !currprefs.cpu_cycle_exact || ( currprefs.cpu_model != 68000 ) )
return;
-fprintf ( stderr , "MegaSTE_CPU_Set_16Mhz %d\n" , set_16);
+//fprintf ( stderr , "MegaSTE_CPU_Set_16Mhz %d\n" , set_16);
/* Enable 16 MHz mode for 68000 CE */
if ( set_16 && ( x_get_iword != get_wordi_ce000_megaste_16 ) )
diff --git a/src/stMemory.c b/src/stMemory.c
index 4cc1914..7b0cd42 100644
--- a/src/stMemory.c
+++ b/src/stMemory.c
@@ -163,6 +163,9 @@ bool STMemory_SafeCopy(uint32_t addr, uint8_t *src, unsigned int len, const char
assert(TTmemory && addr + len <= TTmem_size + 0x1000000);
memcpy(&TTmemory[addr - 0x1000000], src, len);
}
+ /* We modify the memory, so we flush the instr/data caches if needed */
+ M68000_Flush_All_Caches ( addr , 1 );
+
return true;
}
Log_Printf(LOG_WARN, "Invalid '%s' RAM range 0x%x+%i!\n", name, addr, len);
@@ -171,6 +174,8 @@ bool STMemory_SafeCopy(uint32_t addr, uint8_t *src, unsigned int len, const char
{
if ( STMemory_CheckAreaType ( addr, 1, ABFLAG_RAM ) )
put_byte(addr, *src++);
+ /* We modify the memory, so we flush the instr/data caches if needed */
+ M68000_Flush_All_Caches ( addr , 1 );
}
return false;
}